Charles C. (Chip) Weems received the B.S. (with honors) and M.A. degrees from Oregon State University in 1977 and 1979, respectively, and the Ph.D. from the University of Massachusetts at Amherst in 1984. All degrees are in Computer Science. From 1984 to 1998 he directed the Specialized Parallel Architectures research group, and is currently a co-director of the Architecture and Language Implementation research group at the University of Massachusetts, where he is an Associate Professor.
His current research interests include microarchitectures that combine code structure information from the compiler with run-time information to enhance memory and pipeline performance, and simulation environments to support performance studies of current and next generation hardware and software. He has also worked in areas that include branch prediction, memory systems, heterogeneous and parallel architectures, compilation for heterogeneous systems, architectural issues for hard real-time systems, benchmarks for vision, and parallel vision algorithms. He led the development of two generations of both the hardware and software for a heterogeneous parallel processor for machine vision, called the Image Understanding Architecture.
He is the author of numerous technical articles, has served on many program committees, chaired the 1997 IEEE International Workshop on Computer Architecture for Machine Perception, the 1999 IEEE Symposium on the Frontiers of Massively Parallel Processing, and co-chaired the IEEE International Parallel and Distributed Processing Symposium in 1999 and 2000, and was General Vice Chair for IPDPS from 2001 through 2005. He has edited special issues of Machine Vision and Applications and IEEE Computer, has co-authored seventeen widely used introductory computer science texts, and co-edited a book entitled Associative Processing and Processors. Dr. Weems is a member of ACM, a Senior Member of IEEE, a Vice-Chair of the IEEE TC on Parallel Processing, and is an area editor for the Journal of Parallel and Distributed Computing. He was formerly an area editor for the IEEE Transactions on Parallel and Distributed Processing.
Some recent research presentations
Academic and industrial committees and boards