CmpSci 535 Discussion 8

Sequential Circuits

We can build a minimal sequential circuit by cross-coupling the outputs of two gates to each other's inputs. This forms a feedback loop that snaps into one state or another given particular inputs, and holds this state after the inputs are removed. The circuit is a single-bit memory known as a flip- flop.

 

 

The simple flip flop of this form is called an S-R (set-reset) flip-flop because its output is set to one when one of its inputs is 1 and the other is 0, and when the opposite combination of inputs is applied the output becomes 0.

 

Note that 0-0 is an input that causes an invalid output state. We can gang up a bunch of flip-flops to form a register. However, we want to be able to load all of the bits of the register together using multiple input lines but a single control line. How might we do this? Feed the control line to NAND gates at the inputs of the flip- flops. When the control is low, the inputs are applied (inverted) to the flip-flops. When it is low, they see 1. We have to invert the meaning of the inputs to compensate (the top becomes the Set input, and the bottom is Reset in the above diagram.)

 

If we feed one of the inputs through an inverter and an OR gate (see discussion 9 for a diagram) to the other input we get a flip flop that stores its input value when the control signal is applied -- also called a latch or D flip-flop. The D flip-flop is just what we need to build a register. However, it has the nasty property that whenever the control line is high, changes in the input all go through to the output. This could lead subsequent circuitry to produce temporary erroneous results.

 

The solution is to gang two flip flops in series with the control signal going to the second of them inverted. The result is that when the control signal goes low, the second flip flop holds its value while the first one tracks the input. Then, when the control signal goes high again, the first flip-flop locks its value down and the second flip flop takes this final value as its input. Thus, only the one change is seen to occur at the output. The control signal is usually called the clock. Flip flops like this are called master-slave. They can be ganged in series to form a shift register, or in parallel to form a normal register.

 

 

A block of N registers can be assembled to form a register file, and a decoder circuit can be provided that takes a log N input register number and outputs a signal to select the given register (selection is simply the ANDing of this signal with the clock input to the particular register).

 


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