Index to Lecture 16

  1. Lecture 16 Outline
  2. Vector Processing
  3. Array Stride
  4. Implications of Stride
  5. Register-Register Architectures
  6. Vector Operations
  7. Multivector Processing
  8. Cray 1 Overview
  9. Instruction Component
  10. Instruction Component Figure
  11. Address Component
  12. Scalar Component
  13. Vector Component
  14. Cray X-MP
  15. Cray Y-MP
  16. Cray 2
  17. Practical Considerations
  18. Parallel Vector
  19. SIMD Architectures
  20. SIMD Problems
  21. Single Program, Multiple Data
  22. Distributed SMP
  23. Cluster Machine
  24. ASCI Red
  25. Supercomputer power
  26. Space
  27. A Computer Room
  28. A Computer
  29. Another Computer NEC SX-6
  30. Large Scale SMP
  31. Multithreaded SMP
  32. Heterogeneous parallel
  33. Summary

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